74VHC20 Datasheet - STMicroelectronics

74VHC20 DUAL 4-INPUT NAND GATE

The 74VHC20 is an advanced high-speed CMOS DUAL 4-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise PIN CONNECTION AND IEC LOGIC SYMBOLS June 1999 1.

® 74VHC20 DUAL 4-INPUT NAND GATE PRELIMINARY DATA s s s s s s s s s HIGH SPEED: tPD = 3.3 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 20 IMPROVED LATCH-UP IMMUNITY M (Micro Package) T (TS.

74VHC20 Datasheet (51.35 KB)