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M68Z512 4 Mbit 512Kb x8 Low Power SRAM with Output Enable

M68Z512 Description

M68Z512 4 Mbit (512Kb x8) Low Power SRAM with Output Enable s ULTRA LOW DATA RETENTION CURRENT * 100nA (typical) * 10µA (max) s s s .
The M68Z512 is a 4 Mbit (4,194,304 bit) CMOS SRAM, organized as 524,288 words by 8 bits.

M68Z512 Features

* fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 5V ±10% supply, and all inputs and outputs are TTL compatible. This device has an automatic power-down feature, reducing the power consumption by over 99% when desel

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Mbit 512Kb Low Power SRAM with Output Enable ST Microelectronics
ST Microelectronics M68Z512-like datasheet