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PSD813F1-A - Flash In-System Programmable (ISP) Peripherals

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PSD813F1-A Product details

Description

10 8.0 PSD813F1 Register Description and Address Offset 14 9.0 PSD813F1 Functional Blocks 15 9.1 Memory Blocks 15 9.1.1 Main Flash and Secondary EEPROM 15 9.1.2 SRAM 29 9.1.3 Memory Select Signals29 9.1.4 Page Register32 9.2 PLDs 33 9.2.1 Decode PLD (DPLD) 35 9.2.2 Complex PLD (CPLD) 35 9.3 Microcontroller Bus Interface 44 9.3.1 PSD813F Interface to a Multiplexed 8-bit Bus 44 9.3.2 PSD813F Interface to a Non-Multiplexed 8-bit Bus44 9.3.3 Data Byte Enable Reference47 9.3.4 Microcontroller Interf

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