K4H561638F - 256Mb F-die DDR SDRAM Specification
DDR SDRAM 16Mb x 16 32Mb x 8 VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 NC VDDQ LDQS NC VDD NC LDM WE CAS RAS CS NC BA0 BA1 AP/A10 A0 A1 A2 A3 VDD VDD DQ0 VDDQ NC DQ1 VSSQ NC DQ2 VDDQ NC DQ3 VSSQ NC NC VDDQ NC NC VDD NC NC WE CAS RAS CS NC BA0 BA1 AP/A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7
DDR SDRAM 256Mb F-die (x8, x16) DDR SDRAM 256Mb F-die DDR SDRAM Specification Revision 1.3 October, 2004 Rev.
1.3 October, 2004 DDR SDRAM 256Mb F-die (x8, x16) 256Mb F-die Revision History Revision 1.0 (June, 2003) - First version for internal review Revision 1.1 (Agust, 2003) - Added x8 org (K4H560838F) and speed AA Revision 1.2 (May, 2004) - Modified IDD current spec.
Revision 1.3 (October, 2004) - Corrected typo.
DDR SDRAM Rev.
1.3 October, 2004 DDR SDRAM 256Mb F-die (x8, x16) Key Feat
K4H561638F Features
* Double-data-rate architecture; two data transfers per clock cycle
* Bidirectional data strobe L(U)DQS
* Four banks operation
* Differential clock inputs(CK and CK)
* DLL aligns DQ and DQS transition with CK transition
* MRS cycle with address key pro
