K7M323625M Datasheet (Samsung semiconductor) - 1Mx36 & 2Mx18 Flow-Through NtRAM

K7M323625M, 1Mx36 & 2Mx18 Flow-Through NtRAM

The K7M323625M and K7M321825M are 37,748,736-bits Synchronous Static SRAMs.

The N tRAMTM, or No Turnaround Random Access Memory utilizes all bandwidth in any combination of operating cycles.

Address, data inputs, and all control signals except output enable and linear burst order are synchronized to

K7M323625M K7M321825M Document Title 1Mx36 & 2Mx18 Flow-Through NtRAMTM 1Mx36 & 2Mx18-Bit Flow Through N tRAMTM Revision History Rev.

No.

0.0 0.1 0.2 0.3 History 1.

Initial document.

Add 165FBGA package 1.

Update JTAG scan order 1.

Change pin out for 165FBGA - x18/x36 ; 11B => from A to NC , 2R ==> from NC to A 1.

Insert pin at JTAG scan order of 165FBGA in connection with pin out change - x18/x36 ; insert Pin ID of 2R to BIT number of 69 1.

Add Icc, Isb, Isb1 and Isb2 values.

Final dat

K7M323625M Features

* 3.3V+0.165V/-0.165V Power Supply.

* I/O Supply Voltage 3.3V+0.165V/-0.165V for 3.3V I/O or 2.5V+0.4V/-0.125V for 2.5V I/O

* Byte Writable Function.

* Enable clock and suspend operation.

* Single READ/WRITE control pin.

* Self-Timed Write Cycle.