KM432S2030C Datasheet (Samsung semiconductor) - 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL

KM432S2030C, 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL

The KM432S2030C is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock.

I/O transactions are possible on every clock

KM432S2030C CMOS SDRAM 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL Revision 1.1 March 1999 Samsung Electronics reserves the right to change products or specification without notice.

-1- REV.

1.1 Mar.

'99 KM432S2030C Revision History CMOS SDRAM Revision 1.1 (March 12th, 1999) Corrected typo in ordering information on page 3 Revision 1.0 (March 8th, 1999) - Final Spec Removed KM432S2030C-Z@CL2 part (125MHz@CL2) Changed tRDL from 1CLK to 2CLK

KM432S2030C Features

* 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled at the positive