* Synchronous Operation.
* 2 Stage Pipelined operation with 4 Burst.
* On-Chip Address Counter.
* Self-Timed Write Cycle.
* On-Chip Address and Control Registers.
* VDD= 3.3V+0.3V/-0.165V Power Supply.
* VDDQ Supply Voltage 3.3V+0.3V/-0.165V fo
K7A403600M Datasheet (307.80 KB)
K7A403600M
Samsung
307.80 KB
128k x 36 synchronous sram.
K7A403600M Document Title 128Kx36-Bit Synchronous Pipelined Burst SRAM 128Kx36 Synchronous SRAM Revision History Rev. No. 0.0 0.1 0.2 0.3 History In.
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