KS32C50100 Datasheet - Samsung

KS32C50100 Interrupt Controller

Interrupt mode register Reset Value 0x00000000 31 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 INTMOD X X X X X X X X X X X X X X X X X X X X X [20:0] Interrupt mode bits NOTE: Each of the 21 bits in the interrupt mode enable register, INTMOD, corresponds to an in.

KS32C50100 RISC MICROCONTROLLER INTERRUPT CONTROLLER 13 INTERRUPT CONTROLLER The KS32C50100 interrupt controller has a total of 21 interrupt sources. Interrupt requests can be generated by internal function blocks and at external pins. The ARM7TDMI core recongnizes two kinds of interrupts: a normal interrupt request (IRQ), and a fast interrupt request (FIQ). Therefore all KS32C50100 interrupts can be categorized as either IRQ or FIQ. The KS32C50100 interrupt con.

KS32C50100 Features

* ghest priority among the pendi

KS32C50100 Datasheet (70.60 KB)