HYM72V4005GU-50 Datasheet - Siemens

HYM72V4005GU-50 3.3V 4M x 64-Bit EDO-DRAM Module 3.3V 4M x 72-Bit EDO-DRAM Module

Semiconductor Group 2 HYM64(72)V4005/45GU-50/-60 4M x 64/72 DRAM Module Pin Names A0-A10 A0-A10 A0-A11 A0-A9 DQ0 - DQ63 CB0-CB7 RAS0, RAS2 CAS0 - CAS7 WE0, WE2 OE0, OE2 Vcc Vss SCL SDA SA0-SA2 N.C. DU Row Address Input for HYB64/72V4005 Column Address Input for HYB64/72V4005 Row Address Input f.

3.3V 4M × 64-Bit EDO-DRAM Module 3.3V 4M x 72-Bit EDO-DRAM Module 168pin unbuffered DIMM Module with serial presence detect HYM64V4005GU-50/-60 HYM64V4045GU-50/-60 HYM72V4005GU-50/-60 HYM72V4045GU-50/-60 168 Pin JEDEC Standard, Unbuffered 8 Byte Dual In-Line Memory Module for PC main memory applications 1 bank 4M x 64, 4M x 72 in 2k and 4k refresh organisations Optimized for byte-write non-parity or ECC applications Extended Data Out (EDO) Performance: -50 tRAC tCAC tAA tRC tHPC RAS.

HYM72V4005GU-50 Datasheet (95.86 KB)