Datasheet Details
Part number:
SII141
Manufacturer:
Silicon Image
File Size:
125.63 KB
Description:
Panellink(r) Digital Receiver
Features
* an inter-pair skew tolerance up to 1 full input clock cycle and a highly jitter tolerant PLL design. Since all PanelLink products are designed on scaleable CMOS architecture to support future performance requirements while maintaining the same logical interface, system designers can be assured that