SIS5501, SIS5502 - PCI/ISA Cache Memory Controller

Datasheet Details

Part number	SIS5501, SIS5502
Manufacturer	Silicon Integrated System
File Size	632.88 KB
Description	PCI/ISA Cache Memory Controller
Datasheet	SIS5502_SiliconIntegratedSystem.pdf
Note	This datasheet PDF includes multiple part numbers: SIS5501, SIS5502. Please refer to the document for exact specifications by model.

The SiS5501(PCMC) bridges between the host bus and the PCI local bus.

Supports the 51060, 56766, 73590, 815100 MHz and 75 MHz Pentium Processor Supports M1 and Other Pentium Compatible CPU Supports the Pipelined Address Mode of the Pentium or the P54C Processor Integrated Second Level ( L2 ) Cache Controller - Write Through and Write Back Cache Modes - 8 bits or 7 bits Tag with Direct Mapped Organization - Supports Standard and Burst SRAMs - Supports 64 KBytes to 2 MBytes Cache Sizes - Cache Read/Write Cycle of 3-2-2-2 or.

📁 SIS5501 Similar Datasheet

Other Datasheets by Silicon Integrated System

Published: Apr 15, 2010 |