200-pin 64-bit Small Outline, Dual-In-Line Double Data Rate Synchronous DRAM Module Module organization: single rank 128M x 64 VDD = 1.8V ±0.1V, VDDQ 1.8V ±0.1V 1.8V I/O ( SSTL_18 compatible) Auto Refresh (CBR) and Self Refresh 8k Refresh every 64ms Serial Presence Detect with EEPROM Gold-contact pad This module is fully pin and functional compatible to the JE.