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SL74HC109 Dual J-K Flip-Flop with Set and Reset

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Description

SL74HC109 Dual J -K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The SL74HC109 is identical in pinout to the LS/ALS109.The device .

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Datasheet Specifications

Part number
SL74HC109
Manufacturer
System Logic Semiconductor
File Size
47.90 KB
Datasheet
SL74HC109_SystemLogicSemiconductor.pdf
Description
Dual J-K Flip-Flop with Set and Reset

Applications

* of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VI N and VO U T should be constrained to the range GND≤ (VI N or VO U T )≤ VCC. Unused inputs must always be tied to an appropriate logic voltage level (e. g. , either GND or V CC ). Unused outputs

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