* High speed: tpd = 3.6 ns (typ.) at VCC = 5 V
* Low power dissipation: ICC = 2 μA (max) at Ta = 25°C
* High noise immunity: VNIH = VNIL = 28% VCC (min)
* Power down protection is provided on all inputs.
* Balanced propagation delays: tpLH ∼
* tpHL
TC74VHC02FT Datasheet (249.94 KB)
TC74VHC02FT
249.94 KB
Quad 2-input nor gate.
TC74VHC02F/FN/FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC02F,TC74VHC02FN,TC74VHC02FT,TC74VHC02FK
Quad 2-Input NOR Gate
T.
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