* High speed: tpd = 4.5 ns (typ.) at VCC = 5 V
* Low power dissipation: ICC = 4 µA (max) at Ta = 25°C
* High noise immunity: VNIH = VNIL = 28% VCC (min)
* Power down protection is provided on all inputs.
* Balanced propagation delays: tpLH ∼
* tpHL
TC74VHC573FW Datasheet (405.51 KB)
TC74VHC573FW
405.51 KB
Octal d-type latch with 3-state output.
TC74VHC573F/FW/FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC573F,TC74VHC573FW,TC74VHC573FT,TC74VHC573FK
Octal D-Type Latc.
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