TJ200F04M3L - Silicon P-Channel MOSFET

Toshiba

Datasheet Details

(1) AEC-Q101 qualified (2) Low drain-source on-resistance: RDS(ON) = 1.45 mΩ (typ. ) (VGS = -10 V) (3) Low leakage current: IDSS = -10 µA (max) (VDS = -40 V) (4) Enhancement mode: Vth = -2.0 to -3.0 V (VDS = -10 V, ID = -1 mA) 3. Packaging and Internal Circuit TJ200F04M3L TO-220SM(W) 1: Gate 2: Drain (heatsink) 3: Source ©2015-2020 Toshiba Electronic Devices & Storage Corporation 1 Start of commercial production 2014-12 2020-06-24 Rev.8.0 TJ200F04M3L 4. Absolute Maximum Ratings (Note) (Ta.

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Published: Jan 31, 2024 |