(4-BANK x 16,777,216-WORD x 4-BIT) (4-BANK x 8,388,6084-WORD x 8-BIT) (4-BANK x 4,194,304-WORD x 16-BIT) A2V56S20BTP is organized as 4-bank x 16,777,216-word x 4-bit Synchronous DRAM with LVTTL interface and A2V56S30BTP is organized as 4-bank x 8,388,608-word x 8-bit and A2V56S40BTP is organized a
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： ： 94 1 5 ： ： A2V64S40DTPDTP-7PP : (PSC) ： ： #6608 www.DataSheet4U.com 256Mb SDRAM Specification A2V56S20BTP A2V56S30BTP A2V56S40BTP Powerchip Semiconductor Corp.
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A2V56S20BTP Features
* ITEM tCLK tRAS tRCD tAC tRC Icc1 Clock Cycle Time (Min.) CL=2 CL=3 -6 6 42 CL=2 CL=3 V56S20 15 5 60 100 110 130 3 A2V56S20/30/40BTP -7E -7 -75 -8 7 7 45 20 5.4 5.4 63 100 110 130 3 7 45 20 5.4 63 100 110 130 3 10 7.5 45 20 6 5.4 67.5 100 110 130 3 10 8 48 20 6 6 70 95 100 120 3 Unit ns ns ns ns
Datasheet Details
A2V56S20BTP, A2V56S40DTP-7PP
UST
1.02 MB
256mb sdram.
This datasheet PDF includes multiple part numbers: A2V56S20BTP, A2V56S40DTP-7PP.
Please refer to the document for exact specifications by model.
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