A2V56S40BTP, A2V56S40DTP-7PP Datasheet - UST

A2V56S40BTP 256Mb SDRAM

(4-BANK x 16,777,216-WORD x 4-BIT) (4-BANK x 8,388,6084-WORD x 8-BIT) (4-BANK x 4,194,304-WORD x 16-BIT) A2V56S20BTP is organized as 4-bank x 16,777,216-word x 4-bit Synchronous DRAM with LVTTL interface and A2V56S30BTP is organized as 4-bank x 8,388,608-word x 8-bit and A2V56S40BTP is organized a.

www.DataSheet4U.com www.DataSheet4U.com www.DataSheet4U.com ULTRA SOURCE TECHNOLOGY TEL : 886-2-82263168 CORP. LTD. ㆗ ㆒ 1 50 1 7 FAX : 886-2-82263353 17F. NO.150Jian-Yi RD, CHUNG-HO, TAIPEI 235, TAIWAN R.O.C. ` . ：： 94 1 5 ：： A2V64S40DTPDTP-7PP : (PSC) ：： #6608 www.DataSheet4U.com 256Mb SDRAM Specification A2V56S20BTP A2V56S30BTP A2V56S40BTP Powerchip Semiconductor Corp. No.12, Li-Hsin Rd.1, Science-based Industrial Park, Hsin-Chu Taiwan, R.O.C. T.

A2V56S40BTP Features

* ITEM tCLK tRAS tRCD tAC tRC Icc1 Clock Cycle Time (Min.) CL=2 CL=3 -6 6 42 CL=2 CL=3 V56S20 15 5 60 100 110 130 3 A2V56S20/30/40BTP -7E -7 -75 -8 7 7 45 20 5.4 5.4 63 100 110 130 3 7 45 20 5.4 63 100 110 130 3 10 7.5 45 20 6 5.4 67.5 100 110 130 3 10 8 48 20 6 6 70 95 100 120 3 Unit ns ns ns ns

A2V56S40DTP-7PP_UST.pdf