US5S105 Datasheet - Ultra Silicon

US5S105 Low Skew LVCMOS Clock Buffer

US5S105 Features

* High-Performance 1:5 LVCMOS Clock Buffer

* Extremely low additive jitter < 25-fs nominal

* Output Skew < 50 ps (Typical)

* Very low propagation delay < 3 ns

* Synchronous Output Enable Is Available

* Outputs Operate up to 250 MHz for 3.3V

* O

Datasheet Details

US5S105

Ultra Silicon

524.69 KB

Low skew lvcmos clock buffer.

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US5S105 US5S105 Low Skew LVCMOS Clock Buffer Ultra Silicon

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