V96BMC Datasheet - V3 Semiconductor

V96BMC High Performance Burst DRAM Controller

and Pinout Table 2 below lists the pin types found on the V96BMC. Table 3 describes the function of each pin on the V96BMC. Table 4 lists the pins by pin number. Figure 1 shows the pinout for the 132-pin PQFP package and Figure 2 shows the mechanical dimensions of the package. Table 2: Pin Types Pi.

Pin/Software compatible with earlier V96BMC. Direct interfaces to i960Cx/Hx/Jx processors. w w w .D 3.3V DRAM interface support. Near SRAM performance achieved with DRAM. Supports up to 512Mb of DRAM. Interleaved or non-interleaved operation. Supports symmetric and non-symmetric arrays. a ta Sh t e e 4U . m V96BMC Rev. D o c HIGH PERFORMANCE BURST DRAM CONTROLLER FOR i960Cx/Hx/Jx® PROCESSORS Software-con.

V96BMC Features

* A2# CASA1# CASA0# GND VCC3 AA11 AA10 AA9 AA8 GND VCC3 AA7 AA6 AA5 AA4 G

V96BMC Datasheet (127.41 KB)