VSC7105 Datasheet | Vitesse Semiconductor

Features - ANSI X3T11 Fibre Channel patible at 1.0625 Gbit/s - On-chip Fully Monolithic Clock Recovery and Clock Multiplication Circuits Require No External ponents - On Chip Clock Multiplication Relieves System of High Speed Clock Generation - Single +3.3V Supply Operation - Dual Receiver Serial Inputs and Transmitter Outputs for Loopback and Multiple Link Applications - Selectable 10 or 20 bit TTL patible Parallel Interface - High Sensitivity Differential Receiver Suitable for both Coaxial and Optical Link Applications General Description The VSC7105/VSC7106 chipset is patible with the ANSI X3T11 Fibre Channel Standard. Fibre Channel is a high speed munication channel standardized by ANSI for mapping upper layer protocols (ULP) such as SCSI, IP, and HIPPI. Fibre Channel can then provide a channel over which concurrent munication of all ULP’s may exist on a single interconnect between workstations, mainframes, and superputers, and for connection to mass storage devices and other peripherals. The Fibre Channel physical layer is also ideal for building cost effective, very high speed point-to-point munications links. This chipset implements the Fibre Channel electrical transceiver physical layer for 1.0625 Gb/s operation. At 1.0625 Gb/s, Fibre Channel delivers 100 MByte/s of data bandwidth over a single cable. This bandwidth equals or exceeds most bus bandwidths. This chipset performs the high speed serialization and de-serialization function that makes bus-bandwidth, serial munication possible. This chipset can drive electrical cables directly or interface with optical modules. System Block Diagram Controller I/O Bus Bus Logic Transmit FIFO’s Receive FIFO’s VITESSE VSC7107 ENDEC VITESSE VSC7105 TX VITESSE VSC7106 RX 1.0625 Gb/s Serial Data Over Copper or Optical Cable VITESSE VSC7106 RX VITESSE VSC7105 TX G52079-0 Rev. 2.7 ® VITESSE Semiconductor Cororation Page 1 VSC7105/7106 VITESSE 1.0625 Gbit/sec Transmitter/Receiver Chipset for Fibre Channel...