WEDPN4M64V Datasheet (White Electronic Designs)

WEDPN4M64V, 4M x 64 SDRAM

The 32MByte (256Mb) SDRAM is a high-speed CMOS, dynamic random-access ,memory using 4 chips containing 67,108,864 bits.

Each chip is internally conﬁgured as a quad-bank DRAM with a synchronous interface.

Each of the chip’s 16,777,216-bit banks is organized as 4,096 rows by 256 columns by 16 bits.

WEDPN4M64V Features

* High Frequency = 100, 125, 133MHz Package:

* 219 Plastic Ball Grid Array (PBGA), 21 x 21mm Single 3.3V ±0.3V power supply Fully Synchronous; all signals registered on positive edge of system clock cycle Internal pipelined operation; column address can be changed every clock cycle Internal ba