XC5202 Features
* Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 “gates”) - Price competitive with Gate Arrays
* System Level Features - System performance beyond 50 MHz - 6 levels of
Datasheet Details
XC5202, XC5200
Xilinx
568.70 KB
Field programmable gate arrays.
This datasheet PDF includes multiple part numbers: XC5202, XC5200.
Please refer to the document for exact specifications by model.
XC5202 Distributor
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