NJ88C22 Datasheet (Zarlink Inc) - Frequency Synthesiser with resettable counters

NJ88C22, Frequency Synthesiser with resettable counters

Pin no.

DG,DP MP Name PDA Description Analog output from the sample and hold phase comparator for use as a ‘fine’ error signal.

Voltage increases as fv (the output from the ‘M’ counter) phase lead increases; voltage decreases as fr (the output from the reference counter) phase lead increases.

Out

NJ88C22 Frequency Synthesiser with resettable counters DS2439 - 2.2 The NJ88C22 is a synthesiser circuit fabricated on the GPS CMOS process and is capable of achieving high sideband attenuation and low noise performance.

It contains a reference oscillator, 11-bit programmable reference divider, digital and sample-and-hold comparators, 10-bit programmable ‘M’ counter, 7-bit programmable ‘A’ counter and the necessary control and latch circuitry for accepting and latching the input data.

Data is p

NJ88C22 Features

* s Low Power Consumption MP18 Fig.1 Pin connections - top view (not to scale) s s s s High Performance Sample and Hold Phase Detector Serial Input with Fast Update Feature >20MHz Input Frequency Fast Lock-up Time ABSOLUTE MAXIMUM RATINGS Supply voltage, VDD2VSS: Input voltage Open drain output, L