MT8952B Datasheet (Zarlink Semiconductor)

MT8952B, HDLC Protocol Controller

The MT8952B HDLC Protocol Controller frames and formats data packets according to X.25 (Level 2) Recommendations from the CCITT.

D0-D7 A0-A3 R/W CS E IRQ WD VDD VSS RST C-Channel Interface Micro Processor Interface Transmit FIFO Transmit Logic Zero Insertion Flag/Abort Generator TEOP CDSTo A

MT8952B Features

* Formats data as per X.25 (CCITT) level-2 standards

* Go-Ahead sequence generation and detection

* Single byte address recognition

* Microprocessor port and directly accessible registers for flexible operation and control

* 19 byte FIFO in both send and recei