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MT8941B Advanced T1/CEPT Digital Trunk PLL

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Description

MT8941B Advanced T1/CEPT Digital Trunk PLL Data Sheet .
The MT8941B is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS.

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Datasheet Specifications

Part number
MT8941B
Manufacturer
Zarlink Semiconductor
File Size
491.08 KB
Datasheet
MT8941B_ZarlinkSemiconductor.pdf
Description
Advanced T1/CEPT Digital Trunk PLL

Features

* Provides T1 clock at 1.544 MHz locked to an 8 kHz reference clock (frame pulse) Provides CEPT clock at 2.048 MHz and ST-BUS clock and timing signals locked to an internal or external 8 kHz reference clock Typical inherent output jitter (unfiltered)= 0.07 UI peak-to-peak Typical j

Applications

* Synchronization and timing control for T1 and CEPT digital trunk transmission links ST- BUS clock and frame pulse source F0i DPLL #1 C12i 2:1 MUX Variable Clock Control CVb CV ENCV MS0 MS1 MS2 MS3 C8Kb Mode Selection Logic Frame Pulse Control Input Selector 4.096 MHz Clock Co

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