74AC11138 - 3-Line To 8-Line Decoder/Demultiplexer
The 74AC11138 circuit is designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times.
In high-performance memory systems, this decoder can be used to minimize the effects of system decoding.
When employed with high-speed memories
74AC11138 3ĆLINE TO 8ĆLINE DECODER/DEMULTIPLEXER D Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems D Incorporates Three Enable Inputs to Simplify Cascading and/or Data Reception D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise D EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process D 500-mA Typical Latch-Up Immunity at 125°C D Package Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standa