74AC11253 - DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS
1C2 1C3 NC V CC 2C0 Each of these data selectors/multiplexers contains inverters and drivers to supply full binary decoding data selection to the AND-OR gates.
Separate output control inputs are provided for each of the two four-line sections.
The three-state outputs can interface with and drive d
54AC11253, 74AC11253 DUAL 1-OF-4 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS SCAS041A MAY 1988 REVISED APRIL 1993 Permits Multiplexing From N Lines to One Line Performs Parallel-to-Serial Conversion Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise t EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process Package Options Include Plastic Small
