74AC11273 Datasheet - Texas Instruments

74AC11273 OCTAL D-TYPE FLIP-FLOP

These positive-edge-triggered flip-flops implement D-type flip-flop logic with a direct clear input. Data at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. When the clock input is at either the high or low level, the D .

Applications Include: Buffer/Storage Registers Shift Registers Pattern Generators Flow-Through Architecture to Optimize PCB Layout Multiple Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise t EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs 74AC11273 OCTAL D-TYPE FLIP-FLOP W.

74AC11273-etcTI.pdf