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CAB4A 32-Bit 1:2 Command/Address/Control Buffer and 1:4 Differential Clock Buffer

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Description

CAB4A www.ti.com SNAS630B * JULY 2013 * REVISED OCTOBER 2013 CAB4A - DDR4 Register 32-Bit 1:2 Command/Address/Control Buffer and 1:.
The CAB4 is 32-bit 1:2 Command/Address/Control Buffer and 1:4 differential Clock Buffer designed for operation on DDR4 registered DIMMs with a 1.

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Datasheet Specifications

Part number
CAB4A
Manufacturer
Texas Instruments ↗
File Size
849.28 KB
Datasheet
CAB4A-etcTI.pdf
Description
32-Bit 1:2 Command/Address/Control Buffer and 1:4 Differential Clock Buffer

Features

* 1
* 23 DDR4RCD01 JEDEC Compliant
* DDR4 RDIMM and LRDIMM up to DDR4-2400
* 32 Bits 1-to-2 Register Outputs
* 1-to-4 Differential Clock Buffer
* 1.2V Operation
* PLL with Internal Feedback
* Configurable Driver Strength
* Scalable Weak Dr

Applications

* The clock outputs, command/address outputs, control outputs, data buffer control outputs can be enabled in groups, and independently driven with different strengths to compensate for different DIMM net topologies. The DDR4 Register operates from a differential clock (CK_t and CK_c). Inputs are regi

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