CD74HC138-Q1 - 3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER

Texas Instruments

CD74HC138-Q1 Datasheet Preview — Preview of CD74HC138-Q1 PDF

Datasheet Details

Part number	CD74HC138-Q1
Manufacturer	Texas Instruments ↗
File Size	235.02 KB
Description	3- TO 8-LINE INVERTING DECODER/DEMULTIPLEXER
Datasheet	CD74HC138-Q1-etcTI.pdf

CD74HC138-Q1 Product details

Description

ordering information Y7 7 GND 8 10 Y5 9 Y6 The CD74HC138 is a high-speed silicon-gate CMOS decoder well suited to memory address decoding or data routing applications.This circuit

Features

low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low-power Schottky TTL logic. The circuit has three binary select inputs (A0, A1, and A2). If the device is enabled, these inputs determine which one of the eight normally high outputs of the HC138 will go low. Two active-low and one active-high enables (E1, E2, and E3) are provided to ease the cascading of decoders. The decoder’s eight outputs can drive ten low-power Schottky TTL equivalent loads. OR.

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Other Datasheets by Texas Instruments

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Published: Mar 7, 2020 |