* Description
* Fully Static Operation
* Buffered Inputs
* Common Reset
* Negative-Edge Clocking
* Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
CD74HCT393MT Datasheet (0.98 MB)
CD74HCT393MT
0.98 MB
Dual 4-stage binary counter.
Data sheet acquired from Harris Semiconductor SCHS186E
September 1997 - Revised August 2003
CD54HC393, CD74HC393, CD54HCT393, CD74HCT393
High-Speed C.
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