Part number:
CDC2536
Manufacturer:
File Size:
378.82 KB
Description:
3.3-v phase-lock-loop clock driver.
Datasheet Details
The CDC2536 is a high-performance, low-skew, low-jitter clock driver.
It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the clock output signals to the clock input (CLKIN) signal.
It is specifically designed for use with synchronous DRAMs and popular microprocessors op
CDC2536 Features
* Low Output Skew for Clock-Distribution and Clock-Generation Applications
* Operates at 3.3-V VCC
* Distributes One Clock Input to Six Outputs
* One Select Input Configures Three Outputs to Operate at One-Half or Double the Input Frequency
* No External RC Ne
Datasheet Details
CDC2536
378.82 KB
3.3-v phase-lock-loop clock driver.
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