CDC536 Datasheet - Texas Instruments

CDC536 3.3-V Phase-Lock-Loop Clock Driver

The CDC536 is a high-performance, low-skew, low-jitter clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the clock output signals to the clock input (CLKIN) signal. It is specifically designed for use with synchronous DRAMs and popular microprocessors ope.

CDC536 Features

* Low-Output Skew for Clock-Distribution and Clock-Generation Applications

* Operates at 3.3-V VCC

* Distributes One Clock Input to Six Outputs

* One Select Input Configures Three Outputs to Operate at One-Half or Double the Input Frequency

* No External RC Ne

CDC536-etcTI.pdf