CDC586 Datasheet - Texas Instruments

CDC586 3.3-V Phase-Lock-Loop Clock Driver

The CDC586 is a high-performance, low-skew, low-jitter clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the clock output signals to the clock input (CLKIN) signal. It is specifically designed for use with popular microprocessors operating at speeds from .

D Low Output Skew for Clock-Distribution and Clock-Generation Applications D Operates at 3.3-V VCC D Distributes One Clock Input to Twelve Outputs D Two Select Inputs Configure Up to Nine Outputs to Operate at One-Half or Double the Input Frequency D No External RC Network Required D External Feedback Pin (FBIN) Is Used to Synchronize the Outputs to the Clock Input CDC586 3.3-V PHASE-LOCK-LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS336D FEBRUARY 1993 REVISED OCTOBER 1998 D Ap.

CDC586-etcTI.pdf