CDCL1810A - High-Performance Clock Distributor

Description

The CDCL1810A is a high-performance clock distributor.

The programmable dividers, P0 and P1, give a high flexibility to the ratio of the output frequency to the input frequency: FOUT = FIN/P, where P (P0,P1) = 1, 2, 4, 5, 8, 10, 16, 20, 32, 40, 80.

Features

• 1 Single 1.8 V Supply.
• High-Performance Clock Distributor with 10 Outputs.
• Low Input-to-Output Additive Jitter: as low as 10fs RMS.
• Low-Voltage Differential Signaling (LVDS) Input, 100Ω Differential On-Chip Termination, up to 650 MHz Frequency.
• Differential Current Mode Logic (CML) Outputs, 50Ω Single-Ended On-Chip Termination, up to 650 MHz Frequency.
• Two Groups of Five Outputs Each with Independent Frequency Division Ratios.
• Output.