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CDCL1810 - High-Performance Clock Distributor

General Description

The CDCL1810 is a high-performance clock distributor.

The programmable dividers, P0 and P1, give a high flexibility to the ratio of the output frequency to the input frequency: FOUT = FIN/P, where: P (P0,P1) = 1, 2, 4, 5, 8, 10, 16, 20, 32, 40, 80.

Key Features

  • 1 Single 1.8-V Supply.
  • High-Performance Clock Distributor with 10 Outputs.
  • Low Input-to-Output Additive Jitter: as Low as 10fs RMS.
  • Output Group Phase Adjustment.
  • Low-Voltage Differential Signaling (LVDS) Input, 100-Ω Differential On-Chip Termination, up to 650 MHz Frequency.
  • Differential Current Mode Logic (CML) Outputs, 50-Ω Single-Ended On-Chip Termination, up to 650 MHz Frequency.
  • Two Groups of Five Outputs Each with Independent.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Product Folder Sample & Buy Technical Documents Tools & Software Support & Community CDCL1810 SLLS781D – FEBRUARY 2007 – REVISED NOVEMBER 2014 CDCL1810 1.8-V, 10 Output, High-Performance Clock Distributor 1 Features •1 Single 1.