* 1 Ultralow RMS Jitter Performance
* 100-fs RMS Jitter (12 kHz to 20 MHz)
* 123-fs RMS Jitter (100 Hz to 20 MHz)
* Dual-Loop PLLATINUM™ PLL Architecture
* PLL1
* Integrated Low-Noise Crystal Oscillator Circuit
* Holdover Mode When Input Clocks
LMK04816
1.91 MB
Three input low-noise clock jitter cleaner.
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LMK04816
SNAS597C
* JULY 2012
* REVISED JANU.
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