* two programmable clock inputs (CLKin0 and CLKin1) that allow the user to dynamically switch between different clock domains. Each device features 8 clock outputs with independently programmable dividers and delay adjustments. The outputs of the device can be easily synchronized by an external pin (S
LMK01000 Datasheet (474.40 KB)
LMK01000
National Semiconductor
474.40 KB
(lmk01000 - lmk01020) 1.6 ghz high performance clock buffer.
LMK01000/LMK01010/LMK01020 1.6 GHz High Performance Clock Buffer, Divider, and Distributor www.DataSheet4U.com March 6, 2008 LMK01000/LMK01010/LMK0.
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