SN54CDC586 Datasheet - Texas Instruments

SN54CDC586 3.3-V PHASE-LOCK-LOOP CLOCK DRIVER

The SN54CDC586 is a high-performance, low-skew, low-jitter clock driver. It uses a phase-lock loop (PLL) to precisely align, in both frequency and phase, the clock output signals to the clock input (CLKIN) signal. It is specifically designed for use with popular microprocessors operating at speeds f.

SN54CDC586 3.3-V PHASE-LOCK-LOOP CLOCK DRIVER WITH 3-STATE OUPUTS SGBS311A FEBRUARY 1997 REVISED JULY 2002 D Low Output Skew for Clock-Distribution and Clock-Generation Applications D Operates at 3.3-V VCC D Distributes One Clock Input to 12 Outputs D Two Select Inputs Configure Up to Nine Outputs to Operate at One-Half or Double the Input Frequency D No External RC Network Required D External Feedback Pin (FBIN) Is Used to Synchronize the Outputs to the Clock Input D Applic.

SN54CDC586 Datasheet (136.89 KB)