SN74HC166A-EP Datasheet - Texas Instruments

SN74HC166A-EP 8-BIT PARALLEL-LOAD SHIFT REGISTER

SN74HC166AĆEP 8ĆBIT PARALLELĆLOAD SHIFT REGISTER SCLS559 JANUARY 2004 D Controlled Baseline One Assembly/Test Site, One Fabrication Site D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Product-Change Notification D Qualification Pedigree† D Wide Operating Voltage Range of 2 V to 6 V D Outputs Can Drive Up To 10 LSTTL Loads D Low Power Consumption, 80-µA Max ICC D Typical tpd = 13 ns † Component qualification in accordance with JEDEC and industry standa.

SN74HC166A-EP Features

* gated clock (CLK, CLK INH) inputs and an overriding clear (CLR) input. The parallel-in or serial-in modes are established by the shift/ load (SH/LD) input. When high, SH/LD enables the serial (SER) data input and couples the eight flip-flops for serial shifting with each clock (CLK) pulse. When low,

SN74HC166A-EP Datasheet (387.29 KB)