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SN74LVC1G126-EP Single Bus Buffer Gate

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Description

D Controlled Baseline * One Assembly/Test Site, One Fabrication Site D Enhanced Diminishing Manufacturing Sources (DMS) Support D Enhanced Pro.
ordering information This single bus buffer gate is designed for 1.

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Applications

* using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE‡ ORDERABLE PART NUMBER TOP-SIDE MARKING
* 40°C to 85°C SOT (SC-70)
* DCK Reel of 3000 CLVC1G126IDCKREP CN_ ‡

SN74LVC1G126-EP Distributors

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