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SN74LVC2G79 Dual Positive-Edge-Triggered D-Type Flip-Flop

SN74LVC2G79 Description

SN74LVC2G79 www.ti.com SCES498E * OCTOBER 2003 * REVISED DECEMBER 2013 Dual Positive-Edge-Triggered D-Type Flip-Flop Check for Samp.
This dual positive-edge-triggered D-type flip-flop is designed for 1.

SN74LVC2G79 Features

* 1
* 2 Available in the Texas Instruments NanoFree™ Package
* Supports 5-V VCC Operation
* Inputs Accept Voltages to 5.5 V
* Max tpd of 4.2 ns at 3.3 V
* Low Power Consumption, 10-μA Max ICC
* ±24-mA Output Drive at 3.3 V
* Typical VOLP (Output G

SN74LVC2G79 Applications

* using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. 1CLK 1D 2Q GND DCT PACKAGE (TOP VIEW) 18 27 36 45 VCC 1Q 2D 2CLK 1CLK 1D 2Q GND DCU PACKAGE (TOP VIEW) 18 27 36 45 VCC 1Q 2D 2CLK YZP PACKAGE (BOTTOM VIEW) GND

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Dual Positive-Edge-Triggered D-Type Flip-Flop Texas Instruments
Texas Instruments SN74LVC2G79-like datasheet