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74AHC138 3-to-8 line decoder/demultiplexer

74AHC138 Description

74AHC138; 74AHCT138 3-to-8 line decoder/demultiplexer; inverting Rev.5 * 10 September 2020 Product data sheet 1.General .
The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL).

74AHC138 Features

* Balanced propagation delays
* All inputs have Schmitt-trigger action
* Demultiplexing capability
* Multiple input enable for easy expansion
* Ideal for memory chip select decoding
* Inputs accepts voltages higher than VCC
* For 74AHC138 only:

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