74AHC377 Datasheet (nexperia) - Octal D-type flip-flop

74AHC377, Octal D-type flip-flop

The 74AHC377; 74AHCT377 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).

It is speciﬁed in compliance with JEDEC standard No.

7-A.

The 74AHC377; 74AHCT377 has eight edge-triggered, D-type ﬂip-ﬂops with individual D inputs and Q outputs.

A common clock in

74AHC377 Features

* I Balanced propagation delays I All inputs have Schmitt-trigger actions I Inputs accept voltages higher than VCC I Ideal for addressable register applications I Data enable for address and data synchronization I Eight positive-edge triggered D-type ﬂip-ﬂops I Input levels: N For 74AHC377: CMOS level