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74AHC377PW

Octal D-type flip-flop

74AHC377PW Features

* I Balanced propagation delays I All inputs have Schmitt-trigger actions I Inputs accept voltages higher than VCC I Ideal for addressable register applications I Data enable for address and data synchronization I Eight positive-edge triggered D-type flip-flops I Input levels: N For 74AHC377: CMOS level

74AHC377PW General Description

The 74AHC377; 74AHCT377 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC377; 74AHCT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. A common clock in.

74AHC377PW Datasheet (584.98 KB)

Preview of 74AHC377PW PDF

Datasheet Details

Part number:

74AHC377PW

Manufacturer:

nexperia ↗

File Size:

584.98 KB

Description:

Octal d-type flip-flop.
74AHC377; 74AHCT377 Octal D-type flip-flop with data enable; positive-edge trigger Rev. 02 12 June 2008 Product data sheet 1. General desc.

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74AHC377PW Octal D-type flip-flop nexperia

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