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74AHCT573 - Octal D-type transparant latch

This page provides the datasheet information for the 74AHCT573, a member of the 74AHC573 Octal D-type transparant latch family.

Description

The 74AHC573; 74AHCT573 is an 8-bit D-type transparent latch with 3-state outputs.

Features

  • Wide supply voltage range from 2.0 V to 5.5 V.
  • Balanced propagation delays.
  • All inputs have Schmitt-trigger action.
  • Overvoltage tolerant inputs to 5.5 V.
  • High noise immunity.
  • CMOS low power dissipation.
  • Common 3-state output enable input.
  • Functionally identical to the 74AHC373; 74AHCT373.
  • Input levels:.
  • For 74AHC573: CMOS input level.
  • For 74AHCT573: TTL input level.
  • ESD protection:.

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Datasheet preview – 74AHCT573

Datasheet Details

Part number 74AHCT573
Manufacturer nexperia
File Size 276.55 KB
Description Octal D-type transparant latch
Datasheet download datasheet 74AHCT573 Datasheet
Additional preview pages of the 74AHCT573 datasheet.

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Full PDF Text Transcription

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74AHC573; 74AHCT573 Octal D-type transparent latch; 3-state Rev. 8 — 13 July 2020 Product data sheet 1. General description The 74AHC573; 74AHCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs are overvoltage tolerant.
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