74AUP3G0434 Datasheet, Buffer, nexperia

74AUP3G0434 Features

• Buffer
• Wide supply voltage range from 0.8 V to 3.6 V
• High noise immunity
• Complies with JEDEC standards:
• JESD8-12 (0.8 V to 1.3 V)
• JESD8-11 (0.

PDF File Details

Part number:

74AUP3G0434

Manufacturer:

nexperia ↗

File Size:

261.97kb

Download:

📄 Datasheet

Description:

Low-power dual inverter and single buffer. The 74AUP3G0434 is a dual inverter and single buffer. Schmitt trigger action at all inputs makes the circuit tolerant of slower input

74AUP3G0434 Application

• Applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

TAGS

74AUP3G0434

nexperia

📁 Related Datasheet

74AUP3G04 - Low-power triple inverter (nexperia)
74AUP3G04 Low-power triple inverter Rev. 10 — 15 December 2020 Product data sheet 1. General description The 74AUP3G04 provides a low-power, low-vol.

74AUP3G07 - Low-power triple buffer (nexperia)
74AUP3G07 Low-power triple buffer with open-drain output Rev. 3 — 16 December 2020 Product data sheet 1. General description The 74AUP3G07 is a tr.

74AUP3G14 - Low-power triple Schmitt trigger inverter (nexperia)
74AUP3G14 Low-power triple Schmitt trigger inverter Rev. 3 — 8 February 2021 Product data sheet 1. General description The 74AUP3G14 provides three .

74AUP3G16 - Low-power triple buffer (nexperia)
74AUP3G16 Low-power triple buffer Rev. 3 — 7 May 2021 Product data sheet 1. General description The 74AUP3G16 is a triple buffer. Schmitt trigger ac.

74AUP3G17 - Low-power triple Schmitt trigger (nexperia)
74AUP3G17 Low-power triple Schmitt trigger Rev. 3 — 9 February 2021 Product data sheet 1. General description The 74AUP3G17 provides three Schmitt t.

74AUP3G34 - Low-power triple buffer (nexperia)
74AUP3G34 Low-power triple buffer Rev. 5 — 24 June 2022 Product data sheet 1. General description The 74AUP3G34 is a triple buffer. Schmitt trigger .

74AUP3G3404 - Low-power dual buffer and single inverter (nexperia)
74AUP3G3404 Low-power dual buffer and single inverter Rev. 3 — 13 January 2021 Product data sheet 1. General description The 74AUP3G3404 is a dual b.

74AUP1G00 - Low-power 2-input NAND gate (NXP Semiconductors)
.. 74AUP1G00 Low-power 2-input NAND gate Rev. 02 — 29 June 2006 Product data sheet 1. General description The 74AUP1G00 is a high-p.

74AUP1G00 - SINGLE 2 INPUT POSITIVE NAND GATE (Diodes)
74AUP1G00 SINGLE 2 INPUT POSITIVE NAND GATE Description The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended b.

74AUP1G00 - Low-power 2-input NAND gate (nexperia)
74AUP1G00 Low-power 2-input NAND gate Rev. 8 — 13 January 2022 Product data sheet 1. General description The 74AUP1G00 is a single 2-input NAND gate.