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74HC237D - 3-to-8 line decoder/demultiplexer

This page provides the datasheet information for the 74HC237D, a member of the 74HC237 3-to-8 line decoder/demultiplexer family.

Datasheet Summary

Description

The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An).

The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit storage latch.

When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active LOW decoder.

Features

  • Combines 3-to-8 decoder with 3-bit latch.
  • Multiple input enable for easy expansion or independent controls.
  • Active HIGH mutually exclusive outputs.
  • Wide supply voltage range from 2.0 V to 6.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Complies with JEDEC standards:.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • ESD prot.

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Datasheet preview – 74HC237D

Datasheet Details

Part number 74HC237D
Manufacturer nexperia
File Size 258.72 KB
Description 3-to-8 line decoder/demultiplexer
Datasheet download datasheet 74HC237D Datasheet
Additional preview pages of the 74HC237D datasheet.

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Full PDF Text Transcription

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74HC237 3-to-8 line decoder, demultiplexer with address latches Rev. 9 — 11 January 2024 Product data sheet 1. General description The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unless E1 is LOW and E2 is HIGH.
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