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74HC590D - 8-bit binary counter

This page provides the datasheet information for the 74HC590D, a member of the 74HC590 8-bit binary counter family.

Datasheet Summary

Description

The 74HC590 is an 8-bit binary counter with a storage register and 3-state outputs.

The storage register has parallel (Q0 to Q7) outputs.

Features

  • Wide supply voltage range from 2.0 V to 6.0 V.
  • CMOS low power dissipation.
  • High noise immunity.
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.
  • Complies with JEDEC standards:.
  • JESD8C (2.7 V to 3.6 V).
  • JESD7A (2.0 V to 6.0 V).
  • CMOS input levels.
  • Counter and register have independent clock inputs.
  • Counter has master reset.
  • Multiple package options.
  • ESD protection:.

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Datasheet preview – 74HC590D

Datasheet Details

Part number 74HC590D
Manufacturer nexperia
File Size 291.10 KB
Description 8-bit binary counter
Datasheet download datasheet 74HC590D Datasheet
Additional preview pages of the 74HC590D datasheet.

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Full PDF Text Transcription

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74HC590 8-bit binary counter with output register; 3-state Rev. 4 — 14 March 2022 Product data sheet 1. General description The 74HC590 is an 8-bit binary counter with a storage register and 3-state outputs. The storage register has parallel (Q0 to Q7) outputs. The binary counter features master reset counter (MRC) and count enable (CE) inputs. The counter and storage register have separate positive edge triggered clock (CPC and CPR) inputs. If both clocks are connected together, the counter state is always one count ahead of the register. Internal circuitry prevents clocking from the clock enable. A ripple carry output (RCO) is provided for cascading. Cascading is accomplished by connecting RCO of the first stage to CE of the second stage.
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